Federal University of Campina Grande

Cadence University Program Member


General Information

The Federal University of Campina Grande is a member of the Cadence University Program and this web page outlines how Cadence products are used on our campus. This web page only describes the courses and research projects that use Cadence products, other software may also be used but that is not under the scope of this page. Remember: Cadence is the name of a company - students do not "learn Cadence", they learn about Cadence products.

1. Integrated Circuit for Processing of Meteorological Signals 

Type: research
Project of an integrated circuit of a converting sigma-delta with thermoresistive sensor in the mesh of feedback of the converter, with the goal of measuring fluid speeds.

2. Structure and Conception of Integrated Circuit

Type: classroom
Introduction to Microelectronics. Elements of physics of semiconductors, technology and modeling of transistors. Mathematical tools. Basic components. Amplification. Techniques of commuted capacitors. Technique in current way. Introduction to filtering. Introduction to analog-to-digital and digital-to-analog conversion. Noise in integrated circuits. Simulation. Test of ICs.

3. IC of a Analog-to-digital Sigma-delta Converter with Termoresistive Sensor

Type: research
Project of an integrated circuit of a converting sigma-delta with thermoresistive sensor in the mesh of feedback of the converter, with the goal of measuring temperature and humidity.

4. ASIC Design Process. 

Type: classroom
The course introduces basic techniques of optimization of VLSI circuits. Algorithms for circuit partitioning, floorplanning, placement and global routing. Scaling and deep-submicron issues in VLSI design are emphasized.

5. Functional Verification in ASIC Design. 

Type: classroom
This course introduces basic techniques of functional verification of ASIC Design.

6. Speaker Verification IP-Core. 

Type: research
The Speaker Verification IP-Core is responsible for verifying whether a speaker is who he or she claims to be or not. The verification is done by comparing a set of coefficients, extracted in real time from his/her voice, with a set of coefficients (a codebook) previously obtained during a speaker system-training phase. So, there are three possible responses: Accepted, Rejected or Unknown.

7. PLC. 

Type: research
Technology that allows communication through lines of low, medium or high voltage, through a modem that modulates the digital input to an analog signal, using S-FSK modulation, and also demodulates the received signal into a digital signal.

8. PhD Project.

Type: research
Development of a wireless sensor based on RFID technology with the following tools:
1. Virtuoso;
2. QRC;
3. Assura Physical Verification


Type: research
RISC-V.BR is a project developed since 2016 by Embedded Lab as a part of the PEM initiative (Projects for Excellence in Microelectronics), which is the new home of the Brazil-IP team. The goal is to develop a RISC-V based solution for Domestic Internet of Things (DIoT). An SoC will be developed integrating the PLCM IP-core and adding more functionality such as cryptography acceleration or a TrustZone implementation. This could be used, e.g., as part of an intelligent system for monitoring energy consumption and home automation.

10. Digital Signal Processing (DSP) IPs for high-speed optical transceivers

Type: research
This project aims to develop new algorithms/architectures for DSP functions frequently used in high-speed optical transceivers. Basically, the students will develop new IP cores in RTL, focusing on power consumption optimization, area reduction and system performance. The development follows a continuous integration ASIC flow, including front-end design, Universal Verification Methodology, back-end design down to GDSII and sign-off.

Contact for this Web Page

Email: elmar@dsc.ufcg.edu.br - Elmar Melcher
Email: gutemberg@dee.ufcg.edu.br - Gutemberg Gonçalves Júnior
last updated:
November 12nd, 2018

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