/* UFCG/CEEI/LABARC Laboratório de Organização e Arquiteturas de Computadores - LOAC PROF. Elmar Melcher http://lad.dsc.ufcg.edu.br/oac OBJETIVO: Contador Hexa usando Display 7-segmentos. Clock é KEY1, Reset é KEY0. ARQUIVO: Test_HexCount2HEX_v72.sv.txt Atenção 1. Incluir ao projeto: SEG7_Display.v, SEG7_LUT.v e SEG7_LUT_8.v 2. Renomear "Test_HexCount2HEX_v72.sv.txt" para Test_HexCount2HEX_v72.sv" ao usar no quartus! Data: 05/02/2008 \o/ */ module Test_HexCount2HEX_v72( //////////////////////// Clock Input //////////////////////// input CLOCK_27, // 27 MHz input CLOCK_50, // 50 MHz input EXT_CLOCK, // External Clock //////////////////////// Push Button //////////////////////// input logic [3:0] KEY, // Pushbutton[3:0] //////////////////////// DPDT Switch //////////////////////// input logic [17:0] SW, // Toggle Switch[17:0] //////////////////////// 7-SEG Dispaly //////////////////////// output logic [6:0] HEX0, // Seven Segment Digit 0 output logic [6:0] HEX1, // Seven Segment Digit 1 output logic [6:0] HEX2, // Seven Segment Digit 2 output logic [6:0] HEX3, // Seven Segment Digit 3 output logic [6:0] HEX4, // Seven Segment Digit 4 output logic [6:0] HEX5, // Seven Segment Digit 5 output logic [6:0] HEX6, // Seven Segment Digit 6 output logic [6:0] HEX7, // Seven Segment Digit 7 //////////////////////////// LED //////////////////////////// output logic [8:0] LEDG, // LED Green[8:0] output logic [17:0] LEDR, // LED Red[17:0] //////////////////// LCD Module 16X2 //////////////////////////// inout [7:0] LCD_DATA, // LCD Data bus 8 bits output LCD_ON, // LCD Power ON/OFF output LCD_BLON, // LCD Back Light ON/OFF output LCD_RW, // LCD Read/Write Select, 0 = Write, 1 = Read output LCD_EN, // LCD Enable output LCD_RS ); //Reset assigns wire reset_n = KEY[0]; wire my_clk = KEY[1]; reg [31:0] bits_display; assign LEDG[3:2] = ~KEY[3:2]; // 03 m.s. Btn set to 03 m.s.leds assign LEDR[17:0] = SW[17:0]; // Switch to LED red always @(negedge reset_n or posedge my_clk) if (!reset_n) begin bits_display <= 0; end else begin bits_display <= bits_display + 1; end SEG7_Display ( .iCLK(CLOCK_50), .iDIG( bits_display ), .iRST_N(1'b1), .iWR(1'b1), .oSEG0(HEX0), .oSEG1(HEX1), .oSEG2(HEX2), .oSEG3(HEX3), .oSEG4(HEX4), .oSEG5(HEX5), .oSEG6(HEX6), .oSEG7(HEX7) ); endmodule